Delay locked loop having a duty cycle correction circuit

Miscellaneous active electrical nonlinear devices – circuits – and – Signal converting – shaping – or generating – Synchronizing

Reexamination Certificate

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Details

C327S175000

Reexamination Certificate

active

11130062

ABSTRACT:
There is provided a Delay Locked Loop (DLL) including a duty cycle correction circuit capable of controlling a duty error, when the duty error is generated in the DLL. The duty cycle correction circuit controls amounts of electric charges accumulated in storage units, in response to switching control signals received from the external, and outputs duty rate control signals each corresponding to a difference between the amounts of electric charges accumulated in the storage units. Therefore, the DLL including the duty cycle correction circuit can correct a duty cycle of a reference clock signal, in response to the duty rate control signals, and can output a reference clock signal with a duty cycle of 50%.

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patent: 6181178 (2001-01-01), Choi
patent: 6342801 (2002-01-01), Shin
patent: 6373309 (2002-04-01), Bang
patent: 6518809 (2003-02-01), Kotra
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patent: 6643790 (2003-11-01), Yu et al.
patent: 6735669 (2004-05-01), Shin
patent: 6853225 (2005-02-01), Lee
patent: 6859081 (2005-02-01), Hong et al.

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