Pulse or digital communications – Synchronizers – Phase displacement – slip or jitter correction
Patent
1997-09-10
2000-11-07
Chin, Stephen
Pulse or digital communications
Synchronizers
Phase displacement, slip or jitter correction
375362, 375376, 327161, H03D 324
Patent
active
061447137
ABSTRACT:
A phase comparator is adapted to output a predetermined number of pulse signals corresponding to the phase difference between a comparison reference signal and a comparison object signal to be compared therewith. This phase comparator is applied to a DLL (Delay Locked Loop) circuit having a delay circuit, a dummy delay circuit and a delay controller. Further, the phase comparator has a phase comparing section and a pulse number control section. The phase comparing section is used to make a judgement by comparing the phase difference between the comparison reference signal and the comparison object signal with a predetermined value, and the pulse number control section is used to control a number of pulses to be output according to a result of the judgement made by the phase comparing section. Thereby, when the phase difference between an external clock signal and an internal clock signal (namely, a comparison object signal and a comparison reference signal) at power-up and so forth is large, a quantity of delay which is corrected at a time can be increased. Consequently, the lock-up time of the DLL circuit can be reduced.
REFERENCES:
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patent: 5036297 (1991-07-01), Nakamura
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"A 256 Mb SDRAM Using a Register-Controlled Digital DLL", by Hatakeyama et al., 1997 Digest of Technical Papers and Slide Supplement, Feb. 1977.
Chin Stephen
Fan Chieh M.
Fujitsu Limited
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