Pulse or digital communications – Synchronizers – Phase displacement – slip or jitter correction
Reexamination Certificate
2006-04-25
2006-04-25
Bocure, Tesfaldet (Department: 2631)
Pulse or digital communications
Synchronizers
Phase displacement, slip or jitter correction
C375S375000, C375S376000, C327S146000, C327S153000
Reexamination Certificate
active
07035366
ABSTRACT:
A delay locked loop (DLL) circuit comprising: a fundamental phase comparator for detecting a fundamental phase difference of two input signals; a delay circuit; a delay control circuit for adjusting a delay time of the delay circuit in response to an output signal of the fundamental phase comparator; and at least one further phase comparator for detecting a phase difference other than the fundamental phase difference such that an amount of change of the delay time is changed in accordance with the fundamental phase difference.
REFERENCES:
patent: 5610938 (1997-03-01), Kokaji
patent: 5783956 (1998-07-01), Ooishi
patent: 5886946 (1999-03-01), Ooishi
patent: 5892797 (1999-04-01), Deng
patent: 5973525 (1999-10-01), Fujii
patent: 6081145 (2000-06-01), Bandai et al.
patent: 6111442 (2000-08-01), Aulet et al.
patent: 6125157 (2000-09-01), Donnelly et al.
patent: 6215726 (2001-04-01), Kubo
patent: 6342796 (2002-01-01), Jung
patent: 6373913 (2002-04-01), Lee
patent: 6445234 (2002-09-01), Yoon et al.
patent: 6525988 (2003-02-01), Ryu et al.
patent: 6901013 (2005-05-01), Jones et al.
Sawada Seiji
Tokutome Hiroto
Bocure Tesfaldet
Panwalkar Vineeta S.
Renesas Technology Corp.
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