Delay locked loop

Details Delay locked loop Delay locked loop

2007-01-16

2007-01-16

Fan, Chieh M. (Department: 2611)

Pulse or digital communications

Synchronizers

Phase displacement, slip or jitter correction

C375S373000, C375S371000, C375S354000

Reexamination Certificate

active

10241515

ABSTRACT:
A delay locked loop of the present invention which synthesizes data and a clock inputted from outside has: voltage control delay loops having a plurality of delay circuit parts sequentially delaying the clock; a slot selector selecting a slot outputted from the delay circuit parts of the voltage control delay loops; a clock tree part creating a plurality of clocks with the same timing by an output of the slot selector; a phase control part phase-controlling the plurality of delay circuit parts corresponding to the output clock delay variation of the clock tree part; and sensing means on-off controlling all or part of the plurality of delay circuit parts and the slot selector.

REFERENCES:
patent: 3558933 (1971-01-01), Meyer
patent: 6259293 (2001-07-01), Hayase et al.
patent: 6275555 (2001-08-01), Song
patent: 6424580 (2002-07-01), Frey
patent: 2 341 286 (2000-03-01), None

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