Delay lock loop phase glitch error filter

Details Delay lock loop phase glitch error filter Delay lock loop phase glitch error filter

2004-09-02

2011-10-11

Fan, Chieh M (Department: 2611)

Pulse or digital communications

Synchronizers

Phase displacement, slip or jitter correction

C375S327000, C375S377000

Reexamination Certificate

active

08036334

ABSTRACT:
A method and apparatus is provided for providing a phase glitch error filter for a delay lock loop. The device comprises a delay lock loop to provide an output signal based upon a phase difference between a reference signal and a feedback signal. The delay lock loop comprises a filter unit to provide filtering of noise on a phase control signal to substantially reduce a false delay lock loop state.

REFERENCES:
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patent: 5841303 (1998-11-01), Takashi et al.
patent: 6222895 (2001-04-01), Larsson
patent: 6664830 (2003-12-01), Miller
patent: 7058150 (2006-06-01), Buchwald et al.
patent: 2003/0098732 (2003-05-01), Lin
patent: 2004/0140836 (2004-07-01), Miller
patent: WO 99/67882 (1999-12-01), None
patent: WO 02/29975 (2002-04-01), None
Australian Patent Office Search Report dated Jun. 27, 2006.

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