Electrical computers and digital data processing systems: input/ – Input/output data processing – Input/output data buffering
Reexamination Certificate
1998-11-23
2001-07-03
Shin, Christopher B. (Department: 2182)
Electrical computers and digital data processing systems: input/
Input/output data processing
Input/output data buffering
C710S025000
Reexamination Certificate
active
06256685
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates to a disk drive system. More particularly, the present invention relates to a disk controller. Still more particularly, the present invention relates to a disk drive controller that does not release a block of data after an acknowledge signal is received indicating that the block of data was received by a host device.
Problem
In most conventional computer systems, such as a personal computer, it is common to have a disk drive to store data. Those skilled the disk drive arts are constantly striving to increase the speed and efficiency of reading and writing data between disk drives and host devices. For purpose of the present discussion, a host device is any device in a computer system capable of reading and writing data to a disk drive. Some examples are the processor, a video card, and a printer card. The greatest problem in increasing the speed and efficiency of disk drives is that the head of the disk drive must be physically moved over the track on the disk that contains the data. The heads are located on an arm that is moved back and forth across the disk by servo motors. The positioning of the head over the disks takes the greatest amount of time in the read and write processes.
Read operations for retrieving data from a disk and transmitting the data to a host device are performed in the following manner. A disk drive controller receives a request over a bus from a host device. The disk drive controller then determines where the data is stored on the disk. The head is then positioned over the track of the disk storing the data by the disk drive controller. Data is then read from the disk by the head. The drive controller then writes the data into a memory buffer in the disk drive controller. The memory buffer stores the data until the data can be transmitted over the bus. Once the disk drive controller gains control of the bus, the data is divided into data blocks and each data block is transmitted over the bus to the host device. After a data block is transmitted to the host device, the memory in the buffer storing the data block is released and may be overwritten.
When the host device receives the data block, an acknowledge signal is transmitted back to the disk drive controller. If the host device is busy and cannot receive the data block, a busy signal is transmitted back to the disk drive controller by the host device. The disk drive controller must then perform a re-try of the transmission of the data block in response to a busy signal.
A re-try is performed in the following manner. First, the disk drive controller determines if the data block is still in the memory buffer. If the data block is still stored in the memory buffer, the data is transmitted over the bus immediately. If the data block is not in the memory buffer, the disk controller must read the data block from the disk and store the data block in the memory buffer prior to a second transmission. When data block must be read from the disk in a re-try, the total time needed to transmit the data block to the host device is doubled since the re-try is effectively a second read operation from the disk. Therefore, there is a need in the disk drive art for a system that can reduce the number of re-tries the require that the data be read from the disk a second time.
Solution
The above and other problems are solved and an advance in the art is made by the delay release system. This invention has a disk drive controller that does not release a data block from a memory buffer in the controller until an acknowledge signal for the data block is received from the host device. When an acknowledge signal is received for the data block, the memory space in the memory buffer storing the data block is released and may be used to store other data. If a busy signal is received for the data block, the data block is retransmitted from the memory buffer to the host device. This eliminates the need for an additional read from a disk. Thus reducing the time required to complete a read operation for a host device.
A disk drive controller having a drive control integrated circuit containing a memory buffer and link integrated circuit having a FIFO memory buffer can perform the delay release system in the following manner. First, the drive control integrate circuit receives a request signal from a host device requesting data. The drive control integrated circuit then reads the data from the disk and writes the data into the memory buffer. After the data has been written into the buffer, the disk drive control integrated circuit divides the data into data blocks. The data blocks are then transmitted over the link interface to the link integrated circuit which receives the data block and transmits the data block over the bus to the host device.
The link integrated circuit can store up to n data blocks received from the disk drive control integrated circuit in its FIFO before transmitting the data blocks. The blocks are then transmitted to the host device from the FIFO of the link integrated circuit to the host device. The host device then transmits the acknowledge/busy signal after the transfer is attempted.
Acknowledge signals received from the host device may represent any of the nth +1 previous data blocks that have been transmitted by the disk drive control integrated circuit since n data blocks may still be in the FIFO of the link integrated circuit. In order to assure that all data blocks are in memory until the data block has been received by the host, the disk drive control integrated circuit does not release any memory space until after n+1 acknowledge signals are received. After n+1 acknowledge signals have been received, memory storing the data block transmitted n+1 times before the current data block is released. This assures that all data blocks that are currently being transmitted are still stored in the memory buffer. If a busy signal is received, the disk drive control integrated circuit resets the pointer in memory to the data block transmitted n+1 times before the current data block and retransmits all of the data block to the link integrated circuit.
REFERENCES:
patent: 5561823 (1996-10-01), Anderson
patent: 5710943 (1998-01-01), Burton et al.
patent: 5758057 (1998-05-01), Baba et al.
patent: 5909334 (1999-06-01), Barr et al.
Adaptec, Inc.
Duft, Graziano & Forest, P.C.
Shin Christopher B.
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