Delay circuit with delay equal to percentage of input pulse...

Miscellaneous active electrical nonlinear devices – circuits – and – Signal converting – shaping – or generating – Rectangular or pulse waveform width control

Reexamination Certificate

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C327S172000

Reexamination Certificate

active

07920003

ABSTRACT:
A delay circuit with a delay equal to the percentage of the input pulse width is described. In one embodiment, the ratio of the discharge current to the charge-up current of a timing capacitor is used to determine the percentage of the input pulse width used for the output delay. In a first timing phase, the input pulse width is stored as a voltage on the timing capacitor. In a second timing phase, the output is delayed by a percentage of the input pulse width. In a third timing phase, the circuit is restored to the trip point to remove sensitivity to process variation or applied conditions variation such as voltage or temperature (P-V-T variation), and be ready for the next timing cycle.

REFERENCES:
patent: 3883756 (1975-05-01), Dragon
patent: 6504409 (2003-01-01), Laletin
patent: 6664834 (2003-12-01), Nair et al.
patent: 6943604 (2005-09-01), Minzoni
patent: 7061304 (2006-06-01), Anand et al.
patent: 7330061 (2008-02-01), Boerstler et al.
patent: 7420400 (2008-09-01), Boerstler et al.

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