Delay circuit of PCM data

Pulse or digital communications – Synchronizers – Phase displacement – slip or jitter correction

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Details

365220, H04L 700

Patent

active

057402124

ABSTRACT:
The invention once stores PCM data to a memory and after a predetermined time is elapsed, reading in again and making to output whereby makes to delay the PCM data. The invention comprises a memory for once storing a PCM data converted to parallel, a delay time setting circuit for setting a delay time of PCM data, and a comparator and control circuit for comparing a setting value from the delay time setting circuit and a high order 10 bits writing address of the memory and thereby providing an address and control signal for either initiating a high order 10 bits reading address of the memory or else for writing or reading to the memory.

REFERENCES:
patent: 4446490 (1984-05-01), Hoshimi et al.
patent: 4604657 (1986-08-01), Fukami et al.
patent: 5508967 (1996-04-01), Karino

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