Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
Reexamination Certificate
2008-01-15
2008-01-15
Kik, Phallaka (Department: 2825)
Computer-aided design and analysis of circuits and semiconductor
Nanotechnology related integrated circuit design
C703S016000
Reexamination Certificate
active
07320118
ABSTRACT:
A delay analysis device includes a receiving unit that receives a result of a timing analysis of a target circuit to be analyzed, a detecting unit that detects critical paths having delays within a predetermined range, a statistical-delay computing unit that computes a statistical delay of the target circuit based on a cumulative probability distribution of the delays of the critical paths, and a probability-density-distribution computing unit that computes a probability density distribution of delay of a critical path that has the greatest delay in the result. The detecting unit detects x number of critical paths having cumulative delays within computed probability density distribution.
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Homma Katsumi
Matsuoka Hidetoshi
Nitta Izumi
Shibuya Toshiyuki
Fujitsu Limited
Kik Phallaka
Staas & Halsey , LLP
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