Delamination resistant packaged die having support and...

Details Delamination resistant packaged die having support and... Delamination resistant packaged die having support and...

2009-09-08

2011-11-15

Clark, Jasmine (Department: 2815)

Active solid-state devices (e.g., transistors, solid-state diode

Physical configuration of semiconductor

C257S676000, C257SE23002, C257SE23052, C257SE21599

Reexamination Certificate

active

08058706

ABSTRACT:
A packaged electronic device includes a thickness shaped IC die including a top portion, top surface, active circuitry, bottom portion and bottom surface. A cross sectional area of the bottom surface is ≧5% less than a cross sectional area of the top surface to provide a protruding lip having a bottom lip surface. A package substrate includes a top substrate surface including substrate bonding sites, a bottom substrate surface, and a die support structure on the top substrate surface having a gap region. The bottom lip surface of the IC die is secured to the die support structure and the bottom surface of the IC die extends below the die support structure into the gap region. Coupling connectors couple the bonding features on the IC die to the substrate bonding sites.

REFERENCES:
patent: 6489178 (2002-12-01), Coyle et al.
patent: 7067927 (2006-06-01), Mostafazadeh
patent: 7723840 (2010-05-01), Bathan et al.
patent: 7799610 (2010-09-01), Tan et al.
patent: 2004/0245652 (2004-12-01), Ogata

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