Electrical computers and digital processing systems: memory – Storage accessing and control – Memory configuring
Reexamination Certificate
2007-02-20
2007-02-20
Thai, Tuan V. (Department: 2186)
Electrical computers and digital processing systems: memory
Storage accessing and control
Memory configuring
C711S100000, C711S154000, C711S173000
Reexamination Certificate
active
10427085
ABSTRACT:
A data structure, method and system are provided incorporating a general purpose memory allocator and defensive heap memory manager. This provides an ability to reliably detect various types of memory errors, dynamically enable or disable memory debugging, enhance success of read and write operations using various memory verification techniques. Further, through separation of control information associated with allocated and free chunks of memory from the chunks themselves (separation of metadata from actual data), enhanced protection of vital information about the heap memory layout in general is provided. The heap memory manager uses read, write, and execute protected heap header walls and pool header walls and may, for each pool and memory block, separately use hidden front and back Memory Debug Information Areas (MDIAs) with checksums and well-known signature fields thereby enhancing overall memory management.
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Abrashkevich Alexander
Wilding Mark F.
Goshorn Gregory K.
Greg Goshorn, P.C.
International Business Machines - Corporation
Thai Tuan V.
Walker Mark S.
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