Error detection/correction and fault detection/recovery – Pulse or data error handling – Memory testing
Reexamination Certificate
2009-09-29
2011-10-25
Gaffin, Jeffrey A (Department: 2117)
Error detection/correction and fault detection/recovery
Pulse or data error handling
Memory testing
C714S704000, C714S710000
Reexamination Certificate
active
08046646
ABSTRACT:
During manufacture and testing of a memory device, a memory test is performed to determine which, if any, memory blocks are defective. A memory map of the defective blocks is stored in one of the defect-free memory blocks so that it can be read later by a controller during normal operation of the memory device. In one embodiment, the memory test is for a programmability test to determine if the memory block can be programmed. An indication of programmability is stored in each block in a predetermined location.
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Gaffin Jeffrey A
Leffert Jay & Polglaze P.A.
McMahon Daniel F
Micro)n Technology, Inc.
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