Defect management using mutable logical to physical association

Details Defect management using mutable logical to physical association Defect management using mutable logical to physical association

2007-08-21

2010-11-02

Choe, Yong (Department: 2185)

Electrical computers and digital processing systems: memory

Address formation

Address mapping

C711S156000, C365S200000

Reexamination Certificate

active

07827378

ABSTRACT:
The application relates to defect management using mutable logical to physical association. Embodiments disclosed utilize mutable mapping between logical blocks and physical blocks. Dynamically updated mapping data, which mutably associates the logical blocks and the physical blocks, also includes physical block defect allocations.

REFERENCES:
patent: 5313585 (1994-05-01), Jeffries et al.
patent: 5313626 (1994-05-01), Jones et al.
patent: 5844911 (1998-12-01), Schadegg et al.
patent: 6728899 (2004-04-01), Ng et al.
patent: 6738924 (2004-05-01), Williams et al.
patent: 7032087 (2006-04-01), Chang et al.
patent: 7047438 (2006-05-01), Smith et al.
patent: 7124337 (2006-10-01), Lambert et al.
patent: 7188226 (2007-03-01), de Brebisson et al.
patent: 2004/0100719 (2004-05-01), Wilson et al.
patent: 2005/0086573 (2005-04-01), Lambert et al.
patent: 2006/0176947 (2006-08-01), Lim
patent: 2007/0174582 (2007-07-01), Feldman
patent: 2008/0316639 (2008-12-01), Tang et al.

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