Static information storage and retrieval – Read/write circuit – Bad bit
Reexamination Certificate
2006-09-12
2006-09-12
Zarabian, Amir (Department: 2827)
Static information storage and retrieval
Read/write circuit
Bad bit
C365S130000, C365S201000, C365S230030, C365S231000, C365S066000, C365S069000, C365S163000, C365S230060
Reexamination Certificate
active
07106639
ABSTRACT:
A defect management enabled PIRM including a data storage medium providing a plurality of cross point data storage arrays. Each array provides a plurality of memory cells. The arrays are allocated into separate super arrays, the separate super arrays virtually aligned as sets. A controller is also provided, capable of establishing the selection of a virtually aligned set of arrays and a virtually aligned set of memory cells. The controller is operable during a write operation to receive a word of data bits and detect a defective array in the selected virtually aligned set of memory arrays. The controller is further capable of directing the allocation of at least one data bit from the defective memory array to a spare memory array.
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Elder Richard E.
Taussig Carl P.
Hewlett--Packard Development Company, L.P.
Pham Ly Duy
Zarabian Amir
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