Deep trench dram process on SOI for low leakage DRAM cell

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – On insulating substrate or layer

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438388, 438392, H01L 2170, H01L 2700

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active

056270925

ABSTRACT:
A deep trench DRAM cell is formed on a silicon on isolator (SOI) substrate, with a buried strap formed by outdiffusion of dopant in associated trench node material, for providing an electrical connection between the trench node and the active area of a MOS transfer gate formed in the substrate adjacent the trench in an uppermost portion of the substrate.

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