Semiconductor device manufacturing: process – Chemical etching – Combined with coating step
Reexamination Certificate
2006-06-13
2006-06-13
Vu, David (Department: 2818)
Semiconductor device manufacturing: process
Chemical etching
Combined with coating step
C438S704000
Reexamination Certificate
active
07060624
ABSTRACT:
Flared and non-flared metallized deep vias having aspect ratios of about 2 or greater are provided. Blind vias have been fabricated in silicon substrates up to a depth of about 300 microns, and flared through vias have been fabricated up to about 750 microns, the approximate thickness of a silicon substrate wafer, enabling the formation of electrical connections at either or both ends of a via.In spite of the depth and high aspect ratios attainable, the etched vias are completely filled with plated copper conductor, completing the formation of deep vias and allowing fuller use of both sides of the substrate.
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Andricacos Panayotis
Cooper Emanuel Israel
Dalton Timothy Joseph
Deligianni Hariklia
Guidotti Daniel
Aker David
Trepp Robert M.
Vu David
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