Deep alignment marks on edge chips for subsequent alignment...

Semiconductor device manufacturing: process – Semiconductor substrate dicing – Having specified scribe region structure

Reexamination Certificate

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C438S401000, C438S694000, C438S712000

Reexamination Certificate

active

07442624

ABSTRACT:
A method of forming alignment marks on edge chips in a kerf region of a semiconductor workpiece. The alignment marks are formed in at least one material layer of the semiconductor device. The alignment marks are formed using a separate lithography mask, and may extend into lower layers, including the workpiece, of the semiconductor device. An opaque material layer is deposited, and depressions are formed in the opaque layer over the deep alignment mark trenches. The depressions in the opaque material layer are used to align a lithography process to open the opaque material layer over alignment marks in an underlying metallization layer. The alignment marks in the metallization layer are then used to align the lithography process used to pattern the opaque material layer.

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