Decoupling capacitor, wafer stack package including the...

Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package – Multiple housings

Reexamination Certificate

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C257SE23174, C257SE21598

Reexamination Certificate

active

07884458

ABSTRACT:
A decoupling capacitor, a wafer stack package including the decoupling capacitor, and a method of fabricating the wafer stack package are provided. The decoupling capacitor may include a first electrode formed on an upper surface of a first wafer, a second electrode formed on a lower surface of a second wafer, and an adhesive material having a high dielectric constant and combining the first wafer with the second wafer. In the decoupling capacitor the first and second electrodes operate as two electrodes of the decoupling capacitor, and the adhesive material operates as a dielectric of the decoupling capacitor.

REFERENCES:
patent: 6943294 (2005-09-01), Kang et al.
patent: 2002/0025623 (2002-02-01), Yamamichi et al.
patent: 2004/0251529 (2004-12-01), Lee et al.
patent: 2005-340555 (2005-12-01), None
patent: 2000-0053364 (2000-08-01), None
patent: 2006-0026434 (2006-03-01), None
English language abstract of Japanese Publication No. 2005-340555.
English language abstract of Korean Publication No. 2006-0026434.

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