Decoupling capacitance assignment technique with minimum...

Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design

Reexamination Certificate

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C716S030000, C716S030000

Reexamination Certificate

active

06694493

ABSTRACT:

BACKGROUND OF INVENTION
A typical computer system has at least a microprocessor and memory. The microprocessor processes, i.e., executes, instructions to accomplish various tasks of the computer system. Such instructions, along with the data required by the microprocessor when executing these instructions, are stored in some form of memory.
FIG. 1
shows a typical computer system having a microprocessor (
10
) and some form of memory (
12
). The microprocessor (
10
) has, among other components, a central processing unit (also known and referred to as “CPU” or “execution unit”) (
14
) and a memory controller (also known as “load/store unit”) (
16
). The CPU (
14
) is where the actual arithmetic and logical operations of the computer system take place. To facilitate the execution of operations by the CPU (
14
), the memory controller (
16
) provides the CPU (
14
) with necessary instructions and data from the memory (
12
). The memory controller (
16
) also stores information generated by the CPU (
14
) into the memory (
12
).
The operations that occur in a computer system, such as the logical operations in the CPU and the transfer of data between the CPU and memory, require power. If the components responsible for carrying out specific operations do not receive adequate power in a timely manner, computer system performance is susceptible to degradation. As an added challenge, power consumption of modern computers has increased as a consequence of increased operating frequencies. Thus, providing power to the components in a computer system in a sufficient and timely manner has become an issue of significant importance.
Often, power supply to a particular computer system element varies, which, in turn, effects the integrity of the element's output. Typically, this power variation results from the distance between a power supply for the element and the element itself. This distance may lead to the element not receiving power (via current) at the exact time it is required.
As shown in
FIG. 2
, one approach used by designers to combat this performance-inhibiting behavior is introducing decoupling capacitance (also referred to as “decap”) to a particular circuit by positioning one or more decoupling capacitors (
13
) close to elements (
15
) in an integrated circuit (
17
). These decoupling capacitors (
13
) store charge from the power supply and distribute the charge to the elements (
15
) when needed. For example, if power received by a element from a power supply (
19
) attenuates, one or more decoupling capacitors (
13
) will distribute charge to the element (
15
) to ensure that the element (
15
) is not affected by the power variation on the power supply (
19
). In essence, a decoupling capacitor acts as a local power supply for one or more specific elements in a computer system.
However, important considerations must be made as to the assignment of one or more decoupling capacitors to particular capacitance needing elements because capacitors have particular undesirable characteristics. One such characteristic pertains to two types of capacitors: thin-oxide capacitors and thick-oxide capacitors. A thin-oxide capacitor is designed using one or more transistors that have thin gate dielectric thicknesses, and although thin-oxide capacitors provide a relatively large amount of decoupling capacitance, they are prone to undesirable gate-tunneling leakage currents. Such leakage current, in turn, increases the leakage power of a circuit, resulting in increased power dissipation by the circuit. Alternatively, a thick-oxide capacitor is designed using one or more transistors that have thick gate dielectric thicknesses, and although thick-oxide capacitors have less leakage currents, they provide a small amount of decoupling capacitance relative to thin-oxide capacitors. Thus, there is a need for a technique that assigns thin and thick decoupling capacitors such that decoupling capacitance requirements on a circuit are met while minimizing an amount of leakage power dissipated by the decoupling capacitors.
SUMMARY OF INVENTION
According to one aspect of the present invention, a method for assigning thin-oxide and thick-oxide capacitors on an integrated circuit, where the integrated circuit having a capacitance requirement and an available capacitance area, and where the method comprises determining a first amount of capacitance assuming that the available capacitance area is filled with thin-oxide capacitors, determining a second amount of capacitance assuming that the available capacitance area is filled with thick-oxide capacitors, defining a possible capacitance range as a range between the first amount of capacitance and the second amount of capacitance, determining if the capacitance requirement is within the possible capacitance range, and if the capacitance requirement is within the possible capacitance range, assigning thin-oxide capacitors to a first percentage of the available capacitance area, and assigning thick-oxide capacitors to a second percentage of the available capacitance area.
According to another aspect, a computer system comprises a processor, a memory, and instructions, residing in the memory and executable by the processor, for using a capacitance requirement of an integrated circuit, an available capacitance area on the integrated circuit, an available thin-oxide capacitance amount, and an available thick-oxide capacitance amount in order to generate an assignment of thin-oxide and thick-oxide capacitors on the integrated circuit.
According to another aspect, a computer-readable medium having recorded therein instructions executable by processing, the instructions for determining an available thin-oxide capacitance amount, determining an available thick-oxide capacitance amount, and if a capacitance requirement of an integrated circuit is within a certain range, generating an assignment of thin-oxide capacitors on a first percentage of the integrated circuit, and generating an assignment of thick-oxide capacitors on a second percentage of the integrated circuit, where the range is formed by the thin-oxide capacitance amount and the thick-oxide capacitance amount.
According to another aspect, a method for graphically determining an assignment of thin-oxide and thick-oxide capacitors on an available capacitance area of an integrated circuit comprises using a first point to represent an available amount of thin-oxide decoupling capacitance, using a second point to represent an available amount of thick-oxide decoupling capacitance, forming a relationship between the first point and the second point, and determining an intersection of the relationship with a predefined relationship, where the intersection comprises a first component and second component, where the first component represents a first percentage of the available capacitance area to be assigned to thin-oxide capacitors, and where the second component represents a second percentage of the available capacitance area to be assigned to thick-oxide capacitors.
Other aspects and advantages of the invention will be apparent from the following description and the appended claims.


REFERENCES:
patent: 5366920 (1994-11-01), Yamamichi et al.
patent: 5734583 (1998-03-01), Shou et al.
patent: 5811868 (1998-09-01), Bertin et al.

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