Decoupling capacitance analysis method

Details Decoupling capacitance analysis method Decoupling capacitance analysis method

2006-08-01

2006-08-01

Whitmore, Stacy A (Department: 2825)

Computer-aided design and analysis of circuits and semiconductor

Nanotechnology related integrated circuit design

C716S030000, C716S030000

Reexamination Certificate

active

07086026

ABSTRACT:
This method for decoupling capacitance analysis improves upon existing techniques to attempt to give a more accurate representation of the power supply fluctuations on a chip while keeping runtime comparable. This method employs the following techniques:1. A method for descending through hierarchy and dividing the design into a variable sized grid.2. An algorithm to determine which grid locations of a design don't have enough decoupling capacitors for all of the devices in that grid location.3. An algorithm to determine which grid locations are subject to harmful neighboring effects.4. A method to display the results of the calculations in a graphical manor to allow easy identification of problem areas.

REFERENCES:
patent: 6085032 (2000-07-01), Scepanovic et al.
patent: 6323050 (2001-11-01), Dansky et al.

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