Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
Reexamination Certificate
2005-09-27
2005-09-27
Siek, Vuthe (Department: 2825)
Computer-aided design and analysis of circuits and semiconductor
Nanotechnology related integrated circuit design
C716S030000, C716S030000, C716S030000, C716S030000
Reexamination Certificate
active
06951006
ABSTRACT:
Some embodiments of the invention provide a method of identifying routes in a region of an integrated circuit (“IC”) design layout. The region contains at least one net with several routable elements. The method decomposes the IC design-layout region into a tessellated graph. The tessellated graph includes a plurality of edges. The method then specifies a route that connects the net's routable elements by specifying a set of edges that the route intersects.
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Caldwell Andrew
Teig Steven
Cadence Design Systems Inc.
Siek Vuthe
Stattler Johansen & Adeli LLP
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