Decoding with a concatenated error correcting code

Details Decoding with a concatenated error correcting code Decoding with a concatenated error correcting code

2006-11-27

2010-10-05

Alphonse, Fritz (Department: 2112)

Error detection/correction and fault detection/recovery

Pulse or data error handling

Digital data error correction

C714S746000, C714S805000

Reexamination Certificate

active

07810015

ABSTRACT:
A concatenated channel decoding method wherein the bits of a set of N1 bits decoded using a first iterative block decoding algorithm and intended to be decoded using a second block decoding algorithm, are sent in parallel in at least one subset of P bits to a buffer for temporary storage. The decoding method comprises receiving in parallel at least one subset of Q bits belonging to the set of N1 bits sent to the buffer, detecting errors with the help of the second decoding algorithm, based on the bits decoded using the first decoding algorithm, and correcting the bits stored in the buffer as a function of possible errors detected. Detecting errors and/or the correcting the stored bits comprise a parallel processing of the bits of each subset of Q bits received.

REFERENCES:
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patent: 6381728 (2002-04-01), Kang
patent: 1528687 (2005-05-01), None
Chen, Y. et al., “Area Efficient Parallel Decoder Architecture for Long BCH Codes,” Acoustics, Speech, and Signal Processing, IEEE International Conference, Montreal, Canada, May 17-21, 2004, pp. 73-76.
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Urard, P. et al., A 135Mbps DVB-S2 Compliant Codec Based on 64800-bit LDPC and BCH Codes (ISSCC Paper 24.3), Design Automation Conference, Anaheim, California, Jun. 13-17, 2005, pp. 547-548.
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