Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
Reexamination Certificate
2007-10-24
2011-11-08
Kerveros, James C (Department: 2117)
Error detection/correction and fault detection/recovery
Pulse or data error handling
Digital data error correction
Reexamination Certificate
active
08055977
ABSTRACT:
An encoding/decoding device corrects errors by concatenated codes of an ECC code and a parity code to prevent an increase in the circuit scale and to improve error correction performance. The device has encoders for creating a concatenation type encoded data by interleaving a data string into a plurality of blocks at every m (m≧2) bit, adding a parity of an error correcting code and adding a parity bit at every predetermined number of bits for preventing an increase in the circuit scale even if the data string is interleaved into a plurality of blocks, and a parity of error correcting code is generated. Also ECC decoding circuits for correcting an ECC decoded data string using the likeliness of a soft output decoder and parity check result are provided, so a deterioration of correction performance can also be prevented.
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Chinese Office Action and its English translation, issued Aug. 21, 2009.
Fujitsu Limited
Greer Burns & Crain Ltd.
Kerveros James C
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