Decoding device and receiving device

Details Decoding device and receiving device Decoding device and receiving device

2006-09-21

2011-12-06

Guyton, Philip (Department: 2113)

Error detection/correction and fault detection/recovery

Pulse or data error handling

Digital data error correction

C714S755000, C714S781000

Reexamination Certificate

active

08074142

ABSTRACT:
A decoding apparatus for low density parity check codes includes a variable-to-check message generator and a check-to-variable message generator. The variable-to-check message generator includes a variable-to-check processing unit block, provided with an adder, and which is arranged between registers corresponding to locations of ‘1’s in a check matrix. The check-to-variable message generator includes a check-to-variable processing unit block, provided with a comparator, between registers corresponding to locations of ‘1’s in the check matrix. The decoding apparatus for low density parity check codes is simple in configuration and is able to perform high speed processing without using RAMs without the necessity of performing complex control operations.

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