Decoding circuit for on die termination in semiconductor...

Details Decoding circuit for on die termination in semiconductor... Decoding circuit for on die termination in semiconductor...

2007-12-25

2007-12-25

Barnie, Rexford (Department: 2819)

Electronic digital logic circuitry

Signal sensitivity or transmission integrity

Bus or line termination

C326S105000, C327S217000, C365S230060

Reexamination Certificate

active

11017645

ABSTRACT:
A decoding circuit of an on die termination (ODT) control signal for stably performing an ODT operation. The decoding circuit includes: a latch unit for receiving a plurality of input signals and for holding previous output signals of the latch unit when the plurality of input signals are in predetermined logic levels; and a decoding unit for decoding output signals of the latch unit in order to control ODT operation.

REFERENCES:
patent: 4757217 (1988-07-01), Sawada et al.
patent: 4975884 (1990-12-01), Waller
patent: 5187385 (1993-02-01), Koike
patent: 5357622 (1994-10-01), Parks et al.
patent: 5708623 (1998-01-01), Choi
patent: 5949252 (1999-09-01), Taguchi
patent: 6272577 (2001-08-01), Leung et al.
patent: 6448807 (2002-09-01), Ahsanullah
patent: 6552570 (2003-04-01), Taylor et al.
patent: 6628223 (2003-09-01), Nagano
patent: 7019556 (2006-03-01), Yoo
patent: 2004/0000932 (2004-01-01), Jang
patent: 2005/0116736 (2005-06-01), Blodgett et al.
patent: 2005/0248362 (2005-11-01), Choe

Affiliated with

Also associated with

Rating

Decoding circuit for on die termination in semiconductor... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Decoding circuit for on die termination in semiconductor..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Decoding circuit for on die termination in semiconductor... will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-3890167