Decoder of semiconductor memory device

Details Decoder of semiconductor memory device Decoder of semiconductor memory device

2007-05-01

2007-05-01

Phung, Anh (Department: 2824)

Static information storage and retrieval

Read/write circuit

Bad bit

C365S201000

Reexamination Certificate

active

11218717

ABSTRACT:
A column decoder in a semiconductor memory device in which address setting cannot be performed but only a serial access can be performed. The column decoder is constructed by: a redundant fuse for generating a redundant fuse signal; a column decoding circuit for decoding a column address; a column decoding switching circuit for switching an output destination of a decoding result of the column decoding circuit by the redundant fuse signal; and a column driver for driving an output signal of the column decoding switching circuit and generating it to normal column lines and a redundant column line. The column decoding circuit continuously makes the redundant column line operative after the operation of the normal column lines.

REFERENCES:
patent: 5469401 (1995-11-01), Gillingham
patent: 5828624 (1998-10-01), Baker et al.
patent: 6154416 (2000-11-01), Lee et al.
patent: 6320799 (2001-11-01), Miyazaki et al.
patent: 2001/0015932 (2001-08-01), Akaogi et al.
patent: 06-203590 (1994-07-01), None

Affiliated with

Also associated with

Rating

Decoder of semiconductor memory device does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Decoder of semiconductor memory device, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Decoder of semiconductor memory device will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-3817654