Decoder/multiplexer circuit including multi-emitter transistors

Communications: electrical – Continuously variable indicating – With meter reading

Patent

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Details

307243, 307463, 340825930, 357 36, H04Q 352, H03K 19086

Patent

active

047438991

ABSTRACT:
A decoder/multiplexer circuit for selecting one of a plurality of input signals includes an array formed of a plurality of decode transistors. All of the collectors of the decode transistors are commonly formed in a large epitaxial pocket, thereby reducing the amount of chip area required.

REFERENCES:
patent: 3402330 (1968-09-01), Archer
patent: 4394657 (1983-07-01), Isogai et al.
patent: 4524443 (1985-06-01), Crocker et al.
patent: 4616358 (1986-10-01), Rehm et al.

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