Decoder element for producing an output signal having three...

Electronic digital logic circuitry – Function of and – or – nand – nor – or not – Decoding

Reexamination Certificate

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Details

C326S106000, C326S059000, C326S060000

Reexamination Certificate

active

06392445

ABSTRACT:

BACKGROUND OF THE INVENTION
Field of the Invention
The invention relates to a decoder element for producing an output signal having three different potentials.
SUMMARY OF THE INVENTION
It is accordingly an object of the invention to provide a decoder element that produces an output signal having three different potentials at an output based upon input signals.
With the foregoing and other objects in view there is provided, in accordance with the invention a decoder element having an output for providing an output signal with three different potentials which include a first potential, a second potential, and a third potential. The second potential is between the first potential and the third potential. The decoder element includes a first circuit node connected to the output and a second circuit node. A first transistor of a first conduction type and a second transistor of a second conduction type are connected together through the first circuit node. The first transistor has a control connection and the second transistor has a control connection. The decoder element includes a first connection connected, through the first transistor and the second transistor, to a voltage having the second potential. A third transistor of the first conduction type and a fourth transistor of the second conduction type are connected together through the second circuit node. The third transistor has a control connection, the fourth transistor has a control connection connected to the output. The decoder includes a second connection and a third connection. The second connection is connected, through the third transistor and the fourth transistor, to the third connection. The decoder includes a fourth connection connected to the control connection of the first transistor, the control connection of the second transistor, and the control connection of the third transistor. The decoder also includes a fifth transistor of the second conduction type connected between the output and the third connection. The fifth transistor has a control connection connected to the second circuit node.
In accordance with an added feature of the invention, a voltage having the third potential is connected to the second connection; a voltage having the first potential is connected to the first connection, the third connection, and the fourth connection; and the output signal has the first potential.
In accordance with an additional feature of the invention, the first transistor has a threshold voltage and the second transistor has a threshold voltage; a voltage is connected to the first connection that has a potential that is lower than the third potential plus the threshold voltage of the first transistor; a voltage is connected to the second connection that has a potential that is lower than the third potential plus the threshold voltage of the third transistor; a voltage having the third potential is connected to the fourth connection; and the output signal has the second potential.
In accordance with another feature of the invention, a voltage having the first potential is connected to the first connection; a voltage having the third potential is connected to the second connection; a voltage having the second potential is connected to the third connection; a voltage having the first potential is connected to the fourth connection; and the output signal has the second potential.
In accordance with a further feature of the invention, a voltage having the third potential is connected to the first connection; a voltage having the first potential is connected to the second connection, the third connection and the fourth connection; and the output signal has the third potential.
In accordance with a further added feature of the invention, a sixth transistor of the first conduction type connects the first transistor to the second transistor; the first circuit node connects the sixth transistor to the second transistor; and the sixth transistor has a control connection connected to a voltage having the second potential.
In accordance with a further added feature of the invention, there is provided, a decoder group containing two of the inventive decoder elements. The third and fourth connections are connected to one another in each case. The decoder group advantageously permits the production of two output signals at two different outputs, each having three different potentials.
In accordance with a concomitant feature of the invention, there is provided, a decoder circuit containing two of the inventive decoder groups. The fourth connections of all four decoder elements are connected to one another, and the decoder circuit advantageously permits the production of four output signals at four outputs, each having three different potentials.
Other features which are considered as characteristic for the invention are set forth in the appended claims.
Although the invention is illustrated and described herein as embodied in a Decoder element for producing an output signal having three different potentials, it is nevertheless not intended to be limited to the details shown, since various modifications and structural changes may be made therein without departing from the spirit of the invention and within the scope and range of equivalents of the claims.
The construction and method of operation of the invention, however, together with additional objects and advantages thereof will be best understood from the following description of specific embodiments when read in connection with the accompanying drawings.


REFERENCES:
patent: 4038564 (1977-07-01), Hakata
patent: 4499388 (1985-02-01), Adam
patent: 5274278 (1993-12-01), Bauer et al.
patent: 0 436 984 (1991-07-01), None
patent: 0 760 516 (1997-03-01), None
patent: WO 00/16399 (2000-03-01), None

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