Decoder circuit

Details Decoder circuit Decoder circuit

2008-12-24

2010-02-02

Tran, Anh Q (Department: 2819)

Electronic digital logic circuitry

Function of and, or, nand, nor, or not

Decoding

C326S105000, C326S108000

Reexamination Certificate

active

07656197

ABSTRACT:
The decoder circuit includes: a power supply control circuit for supplying a first voltage; first and second transistors connected in series between the power supply control circuit and a first reference node; and third and fourth transistors connected between a connection node between the first and second transistors and a second reference node. The first transistor receives a first signal at its gate, and the second transistor receives a second signal corresponding to the first signal at its gate. The third transistor receives a third signal at its gate, and the fourth transistor receives a fourth signal corresponding to the third signal at its gate. The potential difference between the first voltage and the first reference node is smaller than the potential difference between the first reference node and the second reference node.

REFERENCES:
patent: 5138579 (1992-08-01), Tatsumi et al.
patent: 5936910 (1999-08-01), Hashimoto
patent: 5936911 (1999-08-01), Inaba
patent: 5970018 (1999-10-01), Iwata et al.
patent: 6593776 (2003-07-01), Kumar et al.
patent: 8-236718 (1996-09-01), None

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