Decoder circuit

Details Decoder circuit Decoder circuit

2011-06-28

2011-06-28

Barnie, Rexford N (Department: 2819)

Electronic digital logic circuitry

Function of and, or, nand, nor, or not

Decoding

C345S098000

Reexamination Certificate

active

07969201

ABSTRACT:
A decoder circuit that can prevent the delay of decoder output includes a switch that is put into an ON state when a node A of an NMOS region is not an output channel of a selected gradation voltage. The switch is connected to the node A. Thus, a voltage raised by electric charges accumulated by a coupling capacity C1caused in the node A when the gradation voltage is outputted from an output terminal of the decoder output can be discharged by the switch in the ON state.

REFERENCES:
patent: 5262687 (1993-11-01), Benhamida
patent: 5982702 (1999-11-01), Bosshart
patent: 6518946 (2003-02-01), Ode et al.
patent: 2001/0024183 (2001-09-01), Ode et al.
patent: 2006/0238473 (2006-10-01), Hashimoto
patent: 2007-232977 (2007-09-01), None

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