Decoder based set associative repair cache systems and methods

Details Decoder based set associative repair cache systems and methods Decoder based set associative repair cache systems and methods

2005-09-20

2009-12-08

Ho, Hoai V (Department: 2827)

Static information storage and retrieval

Read/write circuit

Bad bit

C365S185090

Reexamination Certificate

active

07630258

ABSTRACT:
The present invention facilitates memory devices and operation thereof by employing a repair cache system600to correct or repair identified faulty memory locations. The repair cache system600includes a decoder that selects local repair location addresses from repair sets610according to a repair region address604. Comparators616compare the selected local repair location addresses with a local repair address606to identify a match. Repair register banks622that comprise a plurality of repair registers are selected if an associated comparator606identifies a match. Then, a register within the associated register bank is selected according the repair region address604for read/write access. If a match is not identified, a memory location from a main memory630is selected for read/write access.

REFERENCES:
patent: 6055204 (2000-04-01), Bosshart
patent: 6108250 (2000-08-01), Kengeri
patent: 6807114 (2004-10-01), Keeth et al.
patent: 2005/1002805 (2005-02-01), Roohparvar
patent: 2005/0232035 (2005-10-01), Miyakawa et al.

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