Electronic digital logic circuitry – Multifunctional or programmable – Array
Reexamination Certificate
2006-09-12
2006-09-12
Barnie, Rexford (Department: 2819)
Electronic digital logic circuitry
Multifunctional or programmable
Array
C326S037000, C326S038000, C326S039000, C326S041000, C326S047000, C375S233000, C341S100000, C341S101000
Reexamination Certificate
active
07106099
ABSTRACT:
A decision feedback equalization (“DFE”) technique is suitable for use in a serializer-deserializer (“SERDES”) receiver in an integrated circuit (IC). The IC has a summing node coupled to a return-to-zero (“RTZ”) data latch register. The RTZ data latch register has a first (“even”) series of RTZ data latches and a second (“odd”) series of RTZ data latches. A first even tap is coupled to the first even RTZ data latch and provides a feedback signal to the summing node on a first portion of a local clock cycle. A first odd tap is coupled to the first odd RTZ data latch and provides an odd feedback signal to the summing node on a second portion of the local clock cycle.
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Hewett Scott
White Dylan
Xilinx , Inc.
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