Error detection/correction and fault detection/recovery – Data processing system error or fault handling – Reliability and availability
Reexamination Certificate
1996-02-27
2001-03-20
Le, Dieu-Minh T. (Department: 2184)
Error detection/correction and fault detection/recovery
Data processing system error or fault handling
Reliability and availability
C714S037000, C712S227000
Reexamination Certificate
active
06205560
ABSTRACT:
TECHNICAL FIELD OF THE INVENTION
This invention is in the field of integrated circuits, and is more particularly directed to a circuit and method for diagnosing and debugging computer hardware and software.
BACKGROUND OF THE INVENTION
The microprocessor of a computer system is the centralized location for processing a stream of instructions in a software program. The proper operation of the microprocessor during processing of instructions is vital to the operation of the system as a whole. Thus, the diagnosing and debugging of errors in a processor's execution of instructions is crucial to proper performance of the system.
During processing of instructions by a microprocessor, the instructions are fetched from memory and decoded by functional units in the microprocessor and supplied to an execution unit for execution. During execution, the execution unit of the microprocessor uses a number of general purpose registers and control registers to write/read data or store control information. The data and/or control information at any point in time stored in the microprocessor, along with other information being used by the microprocessor, such as the instruction being fetched is called the processor state.
Information about the processor state is used in diagnosing and debugging a microprocessor. In the development stage of a microprocessor, various problems may arise when executing various programs. In addition, various problems may arise when developing a new program for a platform. These various problems include output of wrong data, stall of the microprocessor or destroying data in memory. A person debugging a microprocessor identifies and isolates these various problems by accessing the processor state and analyzing the data. However, accessing the processor states during execution of a program with prior art debugging and diagnosing methods is often difficult and inflexible.
These difficulties increase when the computer system is operating in a mode that supports multitasking. The standard architecture of x386 microprocessors and beyond define three modes of memory addressing: virtual 8086 mode, protected mode, and real mode. In virtual 8086 mode, the processor can simulate a virtual 8086 processor. In real mode memory addressing, the processor uses memory addresses that combine an offset of the instruction or data with a segment base value in a specific segment register. This allows additional memory to be addressed. Real mode has the same base architecture as a 8086 but also has access to the 32 bit register set of the 80386. Protected mode allows a standard 8086 microprocessor to run several tasks concurrently, i.e. multitasking, and other features such as advanced protection facilities and virtual memory. Three mechanisms calculate a memory address in protected mode: offset mechanism, selector mechanism and paging mechanism. Privilege levels are an important part of operating in protected mode. When in protected mode, programs are not allowed to read or write data that has a higher level of privilege. Furthermore, some instructions can only be executed when the processor is operating in the mode with the highest level of privilege. The microprocessor controls the mechanics of switching between tasks. In complex multitasking systems, the conditions that cause failures can be even more complex and difficult to track.
The prior art method of diagnosing and debugging includes the use of software debug interrupt handlers. Prior art debugging handlers are usually assembly language programs executing at system level. Breakpoints are set at specific instructions or data in a program. The breakpoints halt the program and shift the program's operation to the debug interrupt handlers. Prior art debug interrupt handlers however can not access the entire processor state and, the method of setting breakpoints is not very versatile.
A need has thus arisen for a superior way to diagnose and debug errors in the execution of a stream of instructions by a microprocessor.
It is thus an object of the present invention to provide an improved method and apparatus for diagnosing and debugging errors in the execution of a stream of instructions by a microprocessor.
It is a further object of the present invention to provide a more versatile method and apparatus for creating breakpoints in a software program.
It is still a further object of the present invention to provide a superior method and apparatus for diagnosing and debugging a microprocessor with minimum increased hardware and complexity.
Other objects and advantages of the present invention will be apparent to those of ordinary skill in the art having reference to the following specification.
SUMMARY OF THE INVENTION
The present invention is an improved apparatus and method for diagnosing and debugging a processor that is executing a stream of instructions. The circuit comprises a set of configuration registers for specifying one of a plurality of destinations for transfer of program control. When a debug exception is generated, the processor transfers control to the specified destination. The plurality of destinations include system management mode, a JTAG routine, or a software debug interrupt handler. In addition, when in single step execution mode wherein a debug exception is generated after each instruction in the stream of instructions, a debug register specifies either system management mode as the destination in response to a first status of a debug register or a debug interrupt handler as the one of the plurality of destinations in response to a second status of a debug register.
By providing for a plurality of destinations in response to a debug exception, the present invention has the important advantage of accessing more information about the processor state which facilitates the diagnosing and debugging of the processor.
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Bluhm Mark W.
Harder Stanley D.
Hervin Mark W.
Patton William C.
Carr & Ferrell LLP
Le Dieu-Minh T.
VIA-Cyrix Inc.
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