Active solid-state devices (e.g. – transistors – solid-state diode – Physical configuration of semiconductor – With peripheral feature due to separation of smaller...
Reexamination Certificate
2006-03-13
2008-09-02
Hoang, Quoc D (Department: 2892)
Active solid-state devices (e.g., transistors, solid-state diode
Physical configuration of semiconductor
With peripheral feature due to separation of smaller...
C438S459000, C216S053000, C156S250000, C257SE21600
Reexamination Certificate
active
07420263
ABSTRACT:
An array of grooves (23) is formed in a first side (12) of a wafer (10) during a wafer processing method. A back grinding tape (16) is adhered to the first side. An amount of material is removed from the second side (20) of the wafer. An adhesive layer (30) is applied to the second side. Dicing tape (24) is applied to the adhesive layer to create a first wafer assembly (32). The first wafer assembly is supported on a support surface (34) with the dicing tape facing the support surface and the back grinding tape exposed. The back grinding tape is removed and the adhesive layer is severed through the array of grooves to create individually removable die (28).
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Lintec Semiconductor-Related Products Web Site, “Adwill Semiconductor-Related Products”, 1 page, http://www.lintec.co.ip/e-dept/english/adwill/adwill.html, downloaded Mar. 1, 2004.
Lintec Semiconductor-Related Products Web Site, “Products for Dicing Process”, 2 pages, http://www.lintec.co./ip/e-dept/english/adwill/diceproces.html, downloaded Mar. 1, 2004.
Lintec Semiconductor-Related Products Web Site, “Products for back-grinding process”, 1 page, http://www.lintec.co.ip/e-dept/english/adwill/bgproces.html, Downloaded Mar. 1, 2004.
Park Hyun Jin
Park Seung Wook
Aktins Robert D.
ChipPAC, Inc.
Hoang Quoc D
Quarles & Brady LLP
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