Datapath design methodology and routing apparatus

Details Datapath design methodology and routing apparatus Datapath design methodology and routing apparatus

2001-03-30

2003-07-22

Lam, Tuan T. (Department: 2816)

Computer-aided design and analysis of circuits and semiconductor

Nanotechnology related integrated circuit design

C716S030000

Reexamination Certificate

active

06598215

ABSTRACT:

FIELD
The present invention is directed to a routing methodology.
BACKGROUND
As technology migrates toward ultra deep sub-micron feature sizes, designs are becoming increasingly complex with very aggressive goals. For example, microprocessor designs may target operating frequencies of upwards to 4 or 5 GHz, and desire process feature sizes less than or equal to 0.13 &mgr;m. A microprocessor may contain four different types of circuits, namely interface circuits, memory, datapaths and random (controller) circuits. Datapaths are an important part of the design because a majority of computations are performed in these units. Datapath circuits typically account for a large percentage of all the transistors of a microprocessor and consume a large part of the designer's time and effort. To a large extent, the performance of the datapath may determine the performance of the entire integrated circuit (IC). Traditional design automation methodologies are not well suited for the design of high-performance datapaths because they do not exploit the structural regularity of bit-slices. As a result, datapath blocks may be manually designed resulting in a significantly larger design time and cost.


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