Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
Reexamination Certificate
2006-02-28
2006-02-28
Siek, Vuthe (Department: 2825)
Computer-aided design and analysis of circuits and semiconductor
Nanotechnology related integrated circuit design
C703S013000
Reexamination Certificate
active
07007251
ABSTRACT:
Database mining, analysis and optimization techniques in conjunction with the model-based functional coverage analysis are used to turn raw verification and coverage data into design intelligence (DI) and verification intelligence (VI). The required data and attributes are automatically extracted from verification, simulation and coverage analysis databases. Design finite state machine extraction, design functional event extraction, and automatic coverage model generation and optimization techniques are applied to the design HDL description. Coverage model tuning and optimization directives, as well as test spec tuning and optimization directives are generated based on the analysis and mining of various verification, simulation, and coverage databases. An integrated web-based interface portlet is used for access, analysis and management of the resulting databases, generated reports and verification directives. Dissemination rules are used to automatically generate and distribute analysis reports and verification directives to engineers at wired or wireless interface devices via Internet or Intranet.
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Driggs, Hogg & Fry Co. LPA
International Business Machines - Corporation
Lucas James A.
Siek Vuthe
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