Computer graphics processing and selective visual display system – Computer graphics display memory system – Graphic display memory controller
Reexamination Certificate
2004-04-28
2008-08-26
Tung, Kee M. (Department: 2628)
Computer graphics processing and selective visual display system
Computer graphics display memory system
Graphic display memory controller
Reexamination Certificate
active
07417638
ABSTRACT:
A data write circuit includes a receiver which receives pixel data with an affix of display state designating data for designating a display state; a setting section in which set are write control data containing first display state designating data for designating a specific display state and write mode designating data for designating a write mode when the data is written into the memory; and a controller which performs control to write data corresponding to the pixel data into the memory, in accordance with a write mode designated by the write mode designating data, depending on a relationship between the display state designating data and the first display state designating data.
REFERENCES:
patent: 5781479 (1998-07-01), Kimura
patent: 6369826 (2002-04-01), Shimotono et al.
patent: 7009625 (2006-03-01), Dickinson
patent: 2003/0193512 (2003-10-01), Komagata
patent: 2005/0068336 (2005-03-01), Van Dyke et al.
patent: 2001-34258 (2001-02-01), None
Crawford Jacinta
Gunther John E.
Sanyo Electric Co,. Ltd.
Sereboff Steven C.
SoCal IP Law Group LLP
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