Electronic digital logic circuitry – Interface – Current driving
Reexamination Certificate
2002-10-15
2004-04-06
Tan, Vibol (Department: 2819)
Electronic digital logic circuitry
Interface
Current driving
C326S090000, C326S021000
Reexamination Certificate
active
06717439
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a data transmitting/receiving buffer such as a USB (Universal Serial Bus). More particularly, the present invention relates to a test circuit thereof. This application is counterpart of Japanese patent applications, Serial Number 24164/2002, filed Jan. 31, 2002, the subject matter of which is incorporated herein by reference.
2. Description of the Related Art
A USB is an interface to connect peripheral devices such as a keyboard, a mouse, a modem and a printer to a personal computer (hereinafter, referred to as PC) using the same connectors and the same cables. As a result of strategy by each company of COMPAC, INTEL, MICROSOFT and NATIONAL SEMICONDUCTOR, a formal specification is disclosed as USB 1.0 in February, 1996.
According to the USB, 127 functions (peripheral devices) can be connected to one host (one personal computer) at the maximum. In adjustment for a bus, the host manages the adjustment and the only function to which a token is issued from the host can access to this host. The host is connected to the function by means of a half-double connection. A high speed mode, which is 12 Mbps at the maximum and a low speed, which is 1.5 Mbps are mixed in a data transfer speed.
FIG. 2
is a diagram of configuration showing connection of a PC to a peripheral apparatus by a conventional USB.
A personal computer
10
and a peripheral apparatus
20
are connected to each other by a dedicated cable
30
whose both ends are connected to connectors. In the PC
10
is provided with a USB buffer
11
to transmit/receive data to/from the peripheral apparatus
20
and a power supply
12
to supply an electric power to the peripheral apparatus side. In a peripheral apparatus
20
there is provided a USB buffer
21
to transmit/receive data to/from the personal computer
10
via the cable
30
and a power supply
22
to supply the electric power supplied from the personal computer side to the inside the peripheral apparatus.
A configuration of USB buffer
11
of the PC
10
is similar to the USB buffer
21
of the peripheral apparatus
20
. Each of the USB buffer
11
and the USB buffer
21
have nodes
1
a,
1
b,
a differential receiver
2
, single end receivers
3
a,
3
b
and a differential driver
4
.
Nodes
1
a,
1
b
are terminals to be connected to differential signals D+, D− on the cable
30
. The differential receiver
2
is connected to the nodes
1
a,
1
b
and outputs receiving data RD based on potentials of the differential signals D+, D−. When the signal D+ is a “H” level (4V) and the signal D− is an “L” level (0V), the receiving data RD output from the differential receiver
2
becomes “H”. When the signal D+ is “L” and the signal D− is “H” or “L”, the receiving data RD becomes “L”.
The single end receivers
3
a
,
3
b
are buffer amplifiers having configurations, which are Schmitt trigger circuits. The single end receivers
3
a
,
3
b
have a hysteresis characteristic that an output signal becomes “H” when an input signal exceeds a threshold value of the top side (2V), and the output signal becomes “L” when the input signal lowers to less than a threshold value of the bottom side (0.8V). Input parts of the single end receivers
3
a
,
3
b
are respectively connected to the nodes
1
a
,
1
b
, and signals SE
0
, SE
1
are output from the single end receivers
3
a
,
3
b.
The differential driver
4
consists of 3-state-type buffer amplifiers
4
a
,
4
b
, the differential driver
4
outputs data when an output enable signal/OE is “L”, and an output part becomes a high impedance when an output enable signal/OE is “H”. Transmitting data TD are supplied to an input part of the buffer amplifier
4
a
and the output part of the buffer amplifier
4
a
is connected to the node
1
a
. The transmitting data/TD where the transmitting data TD is inverted are supplied to the input part of the buffer at a time of transmitting data, and a signal FSC of “L” is supplied at a time where transmission is finished. The output part of the buffer amplifier is connected to the node
1
b.
The nodes
1
a
,
1
b
in the USB buffer
11
at the PC
10
side respectively are pulled down with a resistance of 1.5&OHgr;. At the peripheral apparatus
20
side, the node
1
a
is pulled up with the resistance of 1.5&OHgr; in a high speed mode, and the node
1
b
is pulled up with the resistance of 1.5&OHgr; in a low speed mode (not shown in FIG.
2
).
To transfer data with less error at a high speed using such a USB, waveforms of the differential signals D+, D− transmitted on the cable
30
are accurately defined.
FIG. 3
is a view showing standard of USB signal waveform in the high speed mode. In
FIG. 3
, an x-axis and a y-axis respectively show a time and a voltage, and
FIG. 3
defines speeds to rise and fall the differential signals D+, D− and standardization of levels of “H”, “L”. It is necessary not to enter waveforms of the differential signals D+, D− corresponding to one element into a reversed portion (eye in a hexagon shape, i.e., eye pattern) in FIG.
3
.
When characteristics of the USB buffers
11
,
21
are tested, for example, the eye pattern of the differential signals D+, D− is observed in a state where the PC
10
is connected to the peripheral apparatus
20
by the cable
30
, and an oscilloscope is connected to the nodes
1
a
,
1
b
of the USB buffer
21
.
However, in the conventional USB buffers
11
,
21
there is a problem in that there is no signal except for the differential signals D+, D− as a signal, which is trigger when the differential signals D+, D− of the nodes
1
a
,
1
b
are observed by the oscilloscope. Therefore, for example, the oscilloscope displays the eye pattern as trigger, which is timing of rise of the signal D+. However, since two-ways communication of half-double is performed in the USB, it is not possible to identify whether an observed waveform is a receiving signal or a transmitting signal. Therefore, there is a problem that in a case where a signal waveform does not meet standardization, it is not possible to specify that either a transmitting operation or a receiving operation has default.
SUMMARY OF THE INVENTION
Therefore, it is an object to provide a data transmitting/receiving buffer such as a USB capable of selecting waveforms of a transmitting signal and a receiving signal to observe the selected waveform, which are capable of overcoming the above drawbacks accompanying the conventional art. The above and other objects can be achieved by combinations described in the independent claims. The dependent claims define further advantageous and exemplary combinations of the present invention.
According to a first aspect of the present invention, a data transmitting/receiving buffer for transmitting/receiving data via a data line provided between a first apparatus and a second apparatus, includes: a receiver which receives a signal on the data line and which outputs the receiving data; a driver which outputs transmitting data to the data line when a transmitting enable signal is supplied; and a transmitting signal trigger output circuit which outputs a transmitting trigger signal based on the transmitting enable signal and the transmitting data.
According to the first aspect, since the data transmitting/receiving buffer is configured as described above, the data transmitting/receiving buffer has the following function.
When the transmitting enable signal and the transmitting data are supplied at a time of output, the signal is transmitted from the driver to the data line, and the transmitting trigger signal is output from the transmitting trigger output circuit based on this output. Therefore, by observing the signal on the data line as trigger, which is the transmitting trigger signal with the oscilloscope, it is possible to select the only transmitting signal to observe the selected signal.
According to a second aspect, a data transmitting/receiving buff
Oki Electric Industry Co. Ltd.
Rabin & Berdo P.C.
Tan Vibol
LandOfFree
Data transmitting/receiving buffer does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Data transmitting/receiving buffer, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Data transmitting/receiving buffer will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3225491