Electrical computers and digital data processing systems: input/ – Intrasystem connection – Bus interface architecture
Reexamination Certificate
2006-05-23
2006-05-23
Perveen, Rehana (Department: 2112)
Electrical computers and digital data processing systems: input/
Intrasystem connection
Bus interface architecture
C713S400000, C713S600000
Reexamination Certificate
active
07051148
ABSTRACT:
A data transmission sequencing method is disclosed. A data read operation from a primary bus to a secondary bus can be executed without having to wait for the complete transfer of write data stored in posted write buffer transferring to the primary bus, as long as the secondary bus is not in use. In the mean time of the primary bus issues a read operation to the secondary bus, the secondary bus can issues write operation to the bridging device when the secondary bus is not in use. Similarly, there is no need to wait for the completion of read operation. With this type of data transmission sequencing mechanism, idle sessions in a conventional transmission sequencing method are eliminated leading to a higher data transmission rate.
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Chuang Wen-Hao
Lai Jiin
Su Chun-Yuan
Tsai Chau-Chad
Tsai Chi-Che
Cerullo Jeremy S.
J.C. Patents
Perveen Rehana
VIA Technologies Inc.
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