Electrical computers and digital data processing systems: input/ – Input/output data processing – Input/output data buffering
Reexamination Certificate
2006-01-03
2009-08-25
Chen, Alan (Department: 2182)
Electrical computers and digital data processing systems: input/
Input/output data processing
Input/output data buffering
C710S061000, C710S309000
Reexamination Certificate
active
07581044
ABSTRACT:
A data flow management system and method in which the application and its clients are made aware of the available credits for each type of transfer before the transfer is attempted. This enables the clients to transmit packets only when the RX side has issued a sufficient number of credits to insure that the transmission will not be stalled. The invention eliminates the need for FIFO buffers in the PCI-Express core, since the application will not transmit packets to the core until the required number of credits for the particular transfer type is available. Therefore, packet transmissions do not require buffering in the core, as they are only sent when they can be sent all the way through the core to the link. The efficient back-to-back transfer support enabled by this protocol increases the overall throughput and efficiency of the system as transfers through the application interface have fewer gaps therebetween, because the credit management protocol with its back-to-back feature reduces the idle times between packets traversing the application interface. An enhanced Quality of Service feature is also introduced by creating an environment where the low-latency packets can receive a highest attention and the lowest transmission wait time.
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Chen Alan
EMC Corporation
Gupta Krishnendu
Ouellette Scott A.
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