Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition
Reexamination Certificate
2008-03-04
2008-03-04
McLean, Kimberly (Department: 2187)
Electrical computers and digital processing systems: memory
Storage accessing and control
Specific memory composition
C711S143000, C711S100000, C711S114000, C711S142000, C713S169000
Reexamination Certificate
active
11084894
ABSTRACT:
A data transmission device includes a memory cache table (4) composed of a DRAM memory, a standard 2.5″ hard disk (5), a control CPU (7), a FPGA (6) (or ASIC), a disk interface (3) and a backup battery. The device is unitized in the same external shape as a standard 3.5″ hard disk and connected to the external computer (2) via the disk interface (3), and the FPGA (6) (or ASIC) manages the memory in the memory cache table (4) based on control actions by the CPU (7).
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DTS, Inc.
Knobbe Martens Olson & Bear LLP
McLean Kimberly
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