Electrical computers and digital data processing systems: input/ – Intrasystem connection – Bus access regulation
Reexamination Certificate
1999-10-15
2001-11-06
Lee, Thomas (Department: 2182)
Electrical computers and digital data processing systems: input/
Intrasystem connection
Bus access regulation
C710S008000, C710S009000, C710S010000, C710S019000, C710S036000, C710S038000, C710S104000, C710S120000, C711S001000, C713S001000, C714S726000, C714S729000
Reexamination Certificate
active
06314486
ABSTRACT:
BACKGROUND
1. Field of the Invention
The present invention relates to control and status registers for controlling and monitoring devices within computer systems. More specifically, the present invention relates to a method and an apparatus for performing read and write operations to control and status registers within a device.
2. Related Art
Processors typically control a device within a computer system through control and status registers (CSRs). In order to determine the state of a device, a processor reads from status registers within the device. In order to configure or control functions of the device, the processor writes to control registers within the device.
As devices have grown increasingly more complex, the number of control and status registers has also increased. Some devices now provide hundreds of control and status registers that can be manipulated by the processor.
In some devices control and status registers are memory-mapped into an address space of the processor so that the processor can directly read from and write to the registers. Unfortunately, other devices do not include such an interface that allows a processor to directly access the control and status registers.
In these devices, control and status registers can be accessed through a serial channel that shifts the desired data values onto and off of the semiconductor chip. Some application specific integrated circuits (ASICs) accomplish this by using a JTAG controller adhering to the IEEE 1149.1 standard. In this type of system, control and status registers are accessed by shifting the data values into a chain of “shadow registers” that temporarily hold copies of the data values for the control and status registers. During a write operation, a chain of data values is shifted into the chain of shadow registers before the shadow registers are copied into the control and status registers in an atomic operation. During a read operation, the control and status register are first copied into the chain of shadow registers in an atomic operation. Next, the shadow registers are shifted off of the chip to complete the read operation. The use of shadow registers allows the control and status registers to be read from and written to in a single atomic operation. This eliminates potential problems in shifting data values through the control and status registers.
Unfortunately, using shadow registers doubles the number of registers required for control and status purposes on the semiconductor chip. This can consume a significant amount of semiconductor real estate for large numbers of control and status registers, which increases the cost of the semiconductor chip. Furthermore, the process of shifting a long chain of shadow registers can be time-consuming, especially if only a single register in the chain needs to be accessed.
What is needed is a method and apparatus for accessing control and status registers for a device that does not require each control and status register to have a corresponding shadow register.
SUMMARY
One embodiment of the present invention provides a system for accessing control and status registers for a device within a computer system. These control and status registers are used to control and configure the device and to read status information from the device. The system operates by serially shifting an index into an index register within the device. This index specifies a target register to be accessed within the control and status registers. During a write operation to the target register, the system serially shifts a data value into a data register within the device, and then moves the data value from the data register into the target register. During a read operation from the target register, the system loads a value into the data register from the target register, and serially shifts the value from the data register to a location outside the device to complete the read operation.
In one embodiment of the present invention, the shifting is performed using a JTAG controller adhering to the IEEE 1149.1 standard. In a variation on this embodiment, the JTAG controller uses separate loops to serially shift the index and the data value. In a variation on the above embodiment, the JTAG controller operates under control of a service processor within the computer system.
In one embodiment of the present invention, the device is located within a semiconductor chip. In another embodiment, the device is located within a circuit board.
In one embodiment of the present invention, the device includes a data routing circuit for routing data between components within the computer system.
In one embodiment of the present invention, status registers from the plurality of control and status registers can be read from and cleared in a single atomic operation.
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Lam Tin Y.
Schulz Jurgen M.
Lee Thomas
Nguyen Tanh
Park Vaughan & Fleming LLP
Sun Microsystems Inc.
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