Electrical computers and digital processing systems: support – Clock – pulse – or timing signal generation or analysis – Multiple or variable intervals or frequencies
Reexamination Certificate
2006-03-14
2006-03-14
Du, Thuan (Department: 2116)
Electrical computers and digital processing systems: support
Clock, pulse, or timing signal generation or analysis
Multiple or variable intervals or frequencies
C713S600000
Reexamination Certificate
active
07013405
ABSTRACT:
In a data transfer device, a selector selects one of delayed clocks 0 to 3, according to random numbers generated by a random number generating circuit. Output from an output terminal of the selector is an output clock whose timing of transition to a HIGH level or a LOW level is randomly changed. Timing to switch output data to be output from each of flip-flops is also randomly changed. As a result, an energy density at some frequency of electromagnetic wave radiated from a signal lines is not raised, so that radiant noises and crosstalk between signals may be reduced.
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patent: 6263082 (2001-07-01), Ishimoto et al.
patent: 6353906 (2002-03-01), Smith et al.
patent: 11290535 (1999-10-01), None
Brother Kogyo Kabushiki Kaisha
Du Thuan
Oliff & Berridg,e PLC
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