Data transfer through a bridge

Details Data transfer through a bridge Data transfer through a bridge

2000-09-25

2003-11-11

Auve, Glenn A. (Department: 2181)

Electrical computers and digital data processing systems: input/

Intrasystem connection

Bus interface architecture

C710S314000

Reexamination Certificate

active

06647454

ABSTRACT:

BACKGROUND
This invention relates to data transfer through a bridge device.
A peripheral component interconnect (PCI) bus is a local bus inside a computer system. A PCI-to-PCI (P2P) bridge is a device that connects two independent PCI buses.
There can be a latency in establishing connections through a P2P bridge. One possible source of acquisition latency may be associated with making a connection to a dynamic random access memory (DRAM). Another source of acquisition latency is associated with the time required to acquire the buses for transactions. The DRAM acquisition latency causes buses to be held in a wait state even though they may be in alignment and ready to receive the DRAM data. These wait states reduce the effective bandwidth of the bridge and lengthen the bus acquisition latency for other agents wishing to conduct transactions on those buses, reducing the overall performance of a computer's IO subsystem.


REFERENCES:
patent: 5594882 (1997-01-01), Bell
patent: 6098134 (2000-08-01), Michels et al.
patent: 6421756 (2002-07-01), Kelley et al.
patent: 6425024 (2002-07-01), Kelley et al.
patent: RE37980 (2003-02-01), Elkhoury et al.
patent: 2302077 (2000-11-01), None

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