Electrical computers and digital data processing systems: input/ – Input/output data processing – Input/output data buffering
Patent
1997-09-11
1999-08-17
Lee, Thomas C.
Electrical computers and digital data processing systems: input/
Input/output data processing
Input/output data buffering
710 33, 710 65, 711127, 711157, G06F 1314, G06F 1202
Patent
active
059387483
ABSTRACT:
A data transfer mechanism for a serial interface is provided whereby data transfer may be precisely controlled, eliminating the need for significant buffering. The data transfer mechanism also provides for flexible data transfer in either a byte mode or a burst mode so as to accommodate any of various telecommunications devices having a range of capabilities and data rates, and minimizes host involvement in the data transfer operation.
REFERENCES:
patent: 4298954 (1981-11-01), Bigelow et al.
patent: 5163132 (1992-11-01), DuLac et al.
patent: 5636362 (1997-06-01), Stone et al.
patent: 5664122 (1997-09-01), Rabe et al.
Lynch John
Nichols James B.
Apple Computer Inc.
Lee Thomas C.
Perveen Rehana
LandOfFree
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