Electrical computers and digital data processing systems: input/ – Input/output data processing – Data transfer specifying
Reexamination Certificate
2011-03-15
2011-03-15
Shin, Christopher B (Department: 2181)
Electrical computers and digital data processing systems: input/
Input/output data processing
Data transfer specifying
C713S150000, C713S189000, C380S247000
Reexamination Certificate
active
07908411
ABSTRACT:
A cryptographic processing device100includes an interruption timing judgment circuit101. The interruption timing judgment circuit101includes an interruption timing judgment register101a, a transfer state reference unit101b, and an interruption timing judgment unit101c. The interruption timing judgment register101astores a table200used by the interruption timing judgment unit101cto judge whether to interrupt transfer performed by a DMAC102. The transfer state reference unit101bmonitors how many bytes among blocks read from a memory14the DMAC102has input into a cryptographic computing circuit103. The interruption timing judgment unit101cjudges whether to switch a transfer target during transfer of image data by the DMAC102, based on the table200stored in the interruption timing judgment register101aand a result of the monitoring by the transfer state reference unit101b(i.e. the number of transferred bytes).
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International Search Report issued Dec. 26, 2007 in the International (PCT) Application of which the present application is the U.S. National Stage.
Panasonic Corporation
Shin Christopher B
Wenderoth , Lind & Ponack, L.L.P.
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