Data transfer device

Details Data transfer device Data transfer device

1992-11-13

1994-08-30

Yoo, Do Hyun

Static information storage and retrieval

Read/write circuit

Simultaneous operations

36523001, 36523002, 36523003, G11C 800

Patent

active

053434277

ABSTRACT:
A data transfer device for controlling data transfer among memories includes a first bus control section for transferring addresses to the first memory through a first address bus, and for controlling input and output of a group of first control signals required to access the first memory. Also included is a second bus control section for transferring addresses in the second memory through the second address bus, and for controlling input and output of a group of second control signals required to access the second memory. A control circuit is used for inputting addresses on the first bus, addresses on the second bus, the group of first control signals and the group of second control signals, and selecting one of them based on the control signals from the first bus control section to supply the first memory, and for executing data transfer in one cycle by executing simultaneous address specification to the first bus control section and the second bus control section.

REFERENCES:
patent: 4835684 (1989-05-01), Kanai
patent: 4891794 (1990-01-01), Hush et al.
patent: 4893279 (1990-01-01), Rahman et al.
patent: 5175839 (1992-12-01), Ikeda et al.

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