Data transfer control system, electronic instrument, and...

Details Data transfer control system, electronic instrument, and... Data transfer control system, electronic instrument, and...

2004-02-20

2008-08-05

Sorrell, Eron J (Department: 2182)

Electrical computers and digital data processing systems: input/

Input/output data processing

Input/output command process

C710S022000, C710S300000

Reexamination Certificate

active

07409467

ABSTRACT:
The system stores a storage address ADK1of a page table element PEK1that was being processed when a bus reset occurred, of page table elements of a page table specified by an ORB1. The system then reads out a storage address ADK2of a page table element PEK2having the same element number as PEK1, of page table elements of an ORB2after the bus reset occurs, and restarts data transfer when ADK1and ADK2are the same. When the page table is absent, addresses DAD1and DAD2that are specified directly by the ORB1and the ORB2are compared. When data transfer is not be restarted but a command CMD1of the ORB1has already been issued to a device, the CMD1is aborted.

REFERENCES:
patent: 5758075 (1998-05-01), Graziano et al.
patent: 6636922 (2003-10-01), Bastiani et al.
patent: 2001/0042141 (2001-11-01), Matsunaga et al.
patent: 01106254 (1989-04-01), None
patent: 2001-177536 (2001-06-01), None
patent: 2001-177537 (2001-06-01), None
U.S. Appl. No. 10/625,748, filed Jul. 24, 2003, Fujita et al.

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