Data transfer control system, electronic instrument,...

Electrical computers and digital data processing systems: input/ – Input/output data processing – Direct memory accessing

Reexamination Certificate

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Details

C710S005000, C710S107000, C710S300000

Reexamination Certificate

active

10625748

ABSTRACT:
A data transfer control system receives a command packet ORB transferred through a bus BUS1(IEEE 1394), issues a command indicated by ORB to a device connected to a bus BUS2(ATA (IDE)/ATAPI), and orders start of a DMA transfer. The command issued based on ORB is aborted after the completion of the DMA transfer. The data transfer control system compares contents of a command packet ORB1transferred before a bus reset with contents of a command packet ORB2transferred after the bus reset. If the contents are different, a command issued based on ORB1is aborted after completion of a DMA transfer. Dummy data is transferred between the data transfer control system and the device connected to the bus BUS2until a DMA transfer is completed. Dummy data transfer is controlled by performing a dummy update on a pointer.

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