Data transfer control device for data transfer over a bus,...

Details Data transfer control device for data transfer over a bus,... Data transfer control device for data transfer over a bus,...

2003-03-04

2008-08-05

Huynh, Kim (Department: 2182)

Electrical computers and digital data processing systems: input/

Input/output data processing

Data transfer specifying

C710S005000, C710S006000, C710S033000, C710S058000

Reexamination Certificate

active

07409471

ABSTRACT:
When a first mode (with-SOF mode) has been set, data transfer is performed while SOF packets are transferred at frame periods, and when a second mode (non-SOF mode) has been set and also non-periodic (bulk) transfer is being performed, the periodic transfer of SOF packets is disabled and non-periodic data is transferred. If there is no non-periodic data to be transferred, a SOF packet is transferred in the frame period, even if the second mode has been set. During host operation with USB on-the-go (OTG), pipe regions are allocated to the packet buffer, and non-periodic data is transferred automatically to or from end points while the periodic transfer of SOF packets is disabled. When all of the automatic transfer instruction signals of the pipe regions are inactive, SOF packets are transferred periodically even if the second mode has been set.

REFERENCES:
patent: 6801959 (2004-10-01), Crutchfield et al.
Cypress, SL811HS Embedded USB Host/Slave Controller, Mar. 14, 2002, Cypress Semicinductor Corporation, Rev. A.
U.S. Appl. No. 10/369,630, filed Feb. 21, 2003, Saito et al.
U.S. Appl. No. 10/377,764, filed Mar. 4, 2003, Saito et al.
U.S. Appl. No. 10/377,765, filed Mar. 4, 2003, Saito et al.
U.S. Appl. No. 10/377,763, filed Mar. 4, 2003, Saito et al.
U.S. Appl. No. 10/377,632, filed Mar. 4, 2003, Saito et al.
Nobuyuki Saito; OTG Controller LSI Taking Reduction of CPU Load Into Consideration; Design Wave Magazine; Apr. 2002; pp. 82-88 and pp. 166; w/translation.

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